Many display devices, such as liquid crystal displays, consist of a matrix of active elements, or pixels, arranged in vertical columns and horizontal rows. The data to be displayed are applied as drive voltages to data lines which are respectively associated with ones of the columns of active elements. The rows of active elements are sequentially scanned and the individual active elements within the addressed row are illuminated in accordance with the amplitude of the data voltage applied to the respective column.
Typically, the flat panel display matrix will consist of several hundred rows and several hundred columns. In order to minimize the number of interconnections to the display it is desirable to incorporate row and column scanning or multiplexing circuitry integrally with the display. Currently, thin-film-transistor (TFT) circuitry is being used by a number of companies to integrate display and addressing circuitry on common substrates. The materials that are being used to fabricate the TFT circuitry are cadmium selenide (CdSe), polycrystalline silicon (poly-Si) and amorphous silicon (A-Si).
The advantage of using poly-Si is its high carrier mobility. Its disadvantages include a narrow spectrum of useable substrate material, relatively high leakage currents, and an excessively high processing temperature.
CdSe has a relatively high carrier mobility and requires lower temperatures to fabricate (Tmax&lt;400.degree. C.). However, it has proven difficult to produce devices with uniform parametric characteristics over a display device.
Amorphous silicon is amenable to fabrication at low temperatures (Tmax&lt;350.degree. C.) on a variety of inexpensive substrate materials. A-Si transistors are simple to fabricate with uniform parametric characteristics across an array. However, the carrier mobility (.mu.&lt;1 cm.sup.2 /VS) is at least an order of magnitude slower than CdSe and poly-Si. The carrier mobility of A-Si is too slow to permit construction of scanning circuitry with conventional designs.
At the current state of the art of integrated flat panel displays, were it not for its low carrier mobility, A-Si would probably be the material of choice for display manufacture.
Scanning circuits for flat-panel display devices have been fabricated in A-Si using conventional circuit designs. An example of this type of scanning circuitry in A-Si is presented in a paper entitled "An Active-Matrix LCD With Integrated Driver Circuits Using A-Si TFTs" by M. Akiyama et al. in Japan Display '86, Proceedings of the 6th International Display Research Conference, September, 1986, at pages 212-215. The device described is a liquid crystal display incorporating an integral A-Si tapped shift register with buffer drivers for scanning the rows in the display matrix. The matrix columns are driven by circuitry external to the display device. The paper provides preliminary test results including output voltage waveforms of the A-Si row scanner. The test data indicates (a) that the maximum frequency of operation is about 30 kHz and (b) that the fall time (i.e. the turn off time) of the shift register scanner approaches 20 .mu. sec even for relatively small area display devices.
Firstly, while the 20 .mu. sec fall time of the row scanner may be acceptable to develop images, a faster fall time is more desirable in order to develop sharper images. Secondly, the 30 kHz frequency limit indicates that a shift register type of scanning arrangement is incapable of performing fast data multiplexing for the display column busses.
A TFT scanner, for commutating the video signal to be displayed to the matrix column busses, is illustrated in the paper "The Design and Simulation of Poly-CdSe TFT Driving Circuits for High Resolution LC Displays" by I. DeRyche, A VanCalster, J. Vanfleteren and A. DeClercq, JAPAN DISPLAY '86, Proceedings of the 6th International Display Research Conference, September 1986, pp. 304-307. This scanner was fabricated with the relatively high mobility material CdSe and includes, a serial-input-parallel-output data shift register, a plurality of data latches each coupled to respective ones of the shift register parallel outputs and associated with a respective one of the matrix column busses, and a plurality of buffer amplifiers each of which has an input coupled to an output of a corresponding latch and an output coupled for driving a column bus. In this arrangement, the shift register is coupled to the latches by a first set of gating devices and the latches are coupled to the buffer amplifiers by a second set of gating devices.
During a given line period, the data stored in the latches are applied, via the buffer amplifiers, to the respective column busses. Concurrently data, or video signal, for the next line of display is serially loaded into the shift register at approximately a 6 MHz clock rate. At the end of a given line period, the data in the shift register is transferred in parallel to the plurality of latches. This data is then coupled to the column busses during the next subsequent line interval.
In light of the speed-performance characteristics reported by M. Akiyama et al., for shift registers fabricated with A-Si, it will readily be appreciated that the commutating circuitry of the type presented by I. DeRyche et al. cannot be fabricated in A-Si and expected to operate at the requisite scanning speeds to drive the vertical columns of a flat panel display device.
Thus, there is a need for commutating circuitry which can be fabricated in materials having relatively low carrier mobility and which can be operated at relatively high rates.